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Update register.rs

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This commit is contained in:
Shunsuke Shibayama 2022-12-22 23:49:21 +09:00
parent af3ece6a1b
commit b69ef5e093
1 changed files with 26 additions and 24 deletions
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18
compiler/erg_compiler/context/register.rs
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@ -87,19 +87,20 @@ impl Context {
None
};
if let Some(_decl) = self.decls.remove(&ident.name) {
Err(TyCheckErrors::from(TyCheckError::duplicate_decl_error(
if !self.cfg.python_compatible_mode {
return Err(TyCheckErrors::from(TyCheckError::duplicate_decl_error(
self.cfg.input.clone(),
line!() as usize,
sig.loc(),
self.caused_by(),
ident.name.inspect(),
)))
} else {
)));
}
}
let vi = VarInfo::new(sig_t, muty, vis, kind, None, self.impl_of(), py_name);
self.future_defined_locals.insert(ident.name.clone(), vi);
Ok(())
}
}
pub(crate) fn declare_sub(
&mut self,
@ -141,14 +142,16 @@ impl Context {
py_name,
);
if let Some(_decl) = self.decls.remove(name) {
Err(TyCheckErrors::from(TyCheckError::duplicate_decl_error(
if !self.cfg.python_compatible_mode {
return Err(TyCheckErrors::from(TyCheckError::duplicate_decl_error(
self.cfg.input.clone(),
line!() as usize,
sig.loc(),
self.caused_by(),
name,
)))
} else {
)));
}
}
self.decls.insert(sig.ident.name.clone(), vi);
if errs.is_empty() {
Ok(())
@ -156,7 +159,6 @@ impl Context {
Err(errs)
}
}
}
pub(crate) fn assign_var_sig(
&mut self,