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sign extension WIP

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Folkert 2023-04-27 12:24:25 +02:00
parent d10ae2412a
commit 10a497fdde
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GPG key ID: 1F17F6FFD112B97C
4 changed files with 40 additions and 1 deletions
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11
crates/compiler/gen_dev/src/generic64/aarch64.rs
View file

@ -765,6 +765,17 @@ impl Assembler<AArch64GeneralReg, AArch64FloatReg> for AArch64Assembler {
}
}
#[inline(always)]
fn movsx_reg_reg(
_buf: &mut Vec<'_, u8>,
_input_width: RegisterWidth,
_output_width: RegisterWidth,
_dst: AArch64GeneralReg,
_src: AArch64GeneralReg,
) {
todo!("move with sign extension");
}
#[inline(always)]
fn mov_freg64_base32(_buf: &mut Vec<'_, u8>, _dst: AArch64FloatReg, _offset: i32) {
todo!("loading floating point reg from base offset for AArch64");

17
crates/compiler/gen_dev/src/generic64/mod.rs
View file

@ -288,6 +288,15 @@ pub trait Assembler<GeneralReg: RegTrait, FloatReg: RegTrait>: Sized + Copy {
Self::mov_reg_reg(buf, RegisterWidth::W8, dst, src);
}
// move with sign extension
fn movsx_reg_reg(
buf: &mut Vec<'_, u8>,
input_width: RegisterWidth,
output_width: RegisterWidth,
dst: GeneralReg,
src: GeneralReg,
);
// base32 is similar to stack based instructions but they reference the base/frame pointer.
fn mov_freg64_base32(buf: &mut Vec<'_, u8>, dst: FloatReg, offset: i32);
@ -2993,7 +3002,13 @@ impl<
ASM::xor_reg64_reg64_reg64(buf, dst_reg, dst_reg, dst_reg);
// move the 8-bit integer
ASM::mov_reg_reg(buf, RegisterWidth::W8, dst_reg, src_reg);
ASM::movsx_reg_reg(
buf,
RegisterWidth::W8,
RegisterWidth::W16,
dst_reg,
src_reg,
);
}
// -- CASTING DOWN --
(U64 | I64, I32 | U32) => {

10
crates/compiler/gen_dev/src/generic64/x86_64.rs
View file

@ -1490,6 +1490,16 @@ impl Assembler<X86_64GeneralReg, X86_64FloatReg> for X86_64Assembler {
) {
mov_reg_reg(buf, register_width, dst, src);
}
#[inline(always)]
fn movsx_reg_reg(
buf: &mut Vec<'_, u8>,
input_width: RegisterWidth,
output_width: RegisterWidth,
dst: X86_64GeneralReg,
src: X86_64GeneralReg,
) {
raw_movsx_reg_reg(buf, input_width, output_width, dst, src);
}
#[inline(always)]
fn mov_freg64_base32(buf: &mut Vec<'_, u8>, dst: X86_64FloatReg, offset: i32) {