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set if overflow
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1 changed files with 3 additions and 2 deletions
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@ -1558,8 +1558,9 @@ impl Assembler<AArch64GeneralReg, AArch64FloatReg> for AArch64Assembler {
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fcvt_freg64_freg32(buf, dst, src);
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}
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fn set_if_overflow(_buf: &mut Vec<'_, u8>, _dst: AArch64GeneralReg) {
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todo!("set if overflow for AArch64");
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#[inline(always)]
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fn set_if_overflow(buf: &mut Vec<'_, u8>, dst: AArch64GeneralReg) {
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cset_reg64_cond(buf, dst, ConditionCode::VS)
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}
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#[inline(always)]
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