mirror of
https://github.com/roc-lang/roc.git
synced 2025-08-04 12:18:19 +00:00
Delete pushes and pops for each instruction
This commit is contained in:
parent
b5d3af0522
commit
4b0c5fd0c6
1 changed files with 189 additions and 201 deletions
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@ -5,7 +5,6 @@ use core::panic;
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use roc_wasm_module::linking::IndexRelocType;
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use roc_error_macros::internal_error;
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use roc_module::symbol::Symbol;
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use roc_wasm_module::opcodes::{OpCode, OpCode::*};
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use roc_wasm_module::serialize::SerialBuffer;
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use roc_wasm_module::{
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@ -31,17 +30,17 @@ struct Insertion {
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}
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macro_rules! instruction_no_args {
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($method_name: ident, $opcode: expr, $pops: expr, $push: expr) => {
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($method_name: ident, $opcode: expr) => {
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pub fn $method_name(&mut self) {
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self.inst($opcode, $pops, $push);
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self.inst($opcode);
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}
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};
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}
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macro_rules! instruction_memargs {
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($method_name: ident, $opcode: expr, $pops: expr, $push: expr) => {
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($method_name: ident, $opcode: expr) => {
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pub fn $method_name(&mut self, align: Align, offset: u32) {
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self.inst_mem($opcode, $pops, $push, align, offset);
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self.inst_mem($opcode, align, offset);
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}
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};
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}
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@ -268,19 +267,19 @@ impl<'a> CodeBuilder<'a> {
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/// Base method for generating instructions
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/// Emits the opcode and simulates VM stack push/pop
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fn inst_base(&mut self, opcode: OpCode, pops: usize, push: bool) {
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fn inst_base(&mut self, opcode: OpCode) {
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self.code.push(opcode as u8);
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}
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/// Plain instruction without any immediates
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fn inst(&mut self, opcode: OpCode, pops: usize, push: bool) {
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self.inst_base(opcode, pops, push);
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fn inst(&mut self, opcode: OpCode) {
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self.inst_base(opcode);
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log_instruction!("{opcode:?}");
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}
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/// Block instruction
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fn inst_block(&mut self, opcode: OpCode, pops: usize) {
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self.inst_base(opcode, pops, false);
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fn inst_block(&mut self, opcode: OpCode) {
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self.inst_base(opcode);
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// We don't support block result types. Too hard to track types through arbitrary control flow.
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// This results in slightly more instructions but not much. (Rust does the same thing!)
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@ -289,14 +288,14 @@ impl<'a> CodeBuilder<'a> {
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log_instruction!("{opcode:?}");
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}
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fn inst_imm32(&mut self, opcode: OpCode, pops: usize, push: bool, immediate: u32) {
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self.inst_base(opcode, pops, push);
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fn inst_imm32(&mut self, opcode: OpCode, immediate: u32) {
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self.inst_base(opcode);
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self.code.encode_u32(immediate);
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log_instruction!("{:10}\t{}", format!("{opcode:?}"), immediate);
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}
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fn inst_mem(&mut self, opcode: OpCode, pops: usize, push: bool, align: Align, offset: u32) {
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self.inst_base(opcode, pops, push);
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fn inst_mem(&mut self, opcode: OpCode, align: Align, offset: u32) {
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self.inst_base(opcode);
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self.code.push(align as u8);
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self.code.encode_u32(offset);
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log_instruction!("{:10} {:?} {}", format!("{opcode:?}"), align, offset);
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@ -312,59 +311,48 @@ impl<'a> CodeBuilder<'a> {
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***********************************************************/
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instruction_no_args!(unreachable_, UNREACHABLE, 0, false);
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instruction_no_args!(nop, NOP, 0, false);
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instruction_no_args!(unreachable_, UNREACHABLE);
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instruction_no_args!(nop, NOP);
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pub fn block(&mut self) {
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self.inst_block(BLOCK, 0);
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self.inst_block(BLOCK);
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}
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pub fn loop_(&mut self) {
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self.inst_block(LOOP, 0);
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self.inst_block(LOOP);
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}
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pub fn if_(&mut self) {
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self.inst_block(IF, 1);
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self.inst_block(IF);
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}
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pub fn else_(&mut self) {
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self.inst(ELSE, 0, false);
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self.inst(ELSE);
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}
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pub fn end(&mut self) {
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self.inst_base(END, 0, false);
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log_instruction!("END");
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self.inst(END);
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}
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pub fn br(&mut self, levels: u32) {
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self.inst_imm32(BR, 0, false, levels);
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self.inst_imm32(BR, levels);
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}
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pub fn br_if(&mut self, levels: u32) {
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// In dynamic execution, br_if can pop 2 values if condition is true and the target block has a result.
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// But our stack model is for *static* analysis and we need it to be correct at the next instruction,
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// where the branch was not taken. So we only pop 1 value, the condition.
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self.inst_imm32(BRIF, 1, false, levels);
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self.inst_imm32(BRIF, levels);
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}
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#[allow(dead_code)]
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fn br_table() {
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todo!("br instruction");
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unimplemented!("br_table instruction is not currently used");
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}
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instruction_no_args!(return_, RETURN, 0, false);
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instruction_no_args!(return_, RETURN);
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pub fn call(&mut self, function_index: u32, n_args: usize, has_return_val: bool) {
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self.call_impl(function_index, n_args, has_return_val, false)
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pub fn call(&mut self, function_index: u32, _n_args: usize, _has_return_val: bool) {
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self.call_impl(function_index, false)
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}
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pub fn call_import(&mut self, function_index: u32, n_args: usize, has_return_val: bool) {
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self.call_impl(function_index, n_args, has_return_val, true)
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pub fn call_import(&mut self, function_index: u32, _n_args: usize, _has_return_val: bool) {
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self.call_impl(function_index, true)
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}
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#[inline(always)]
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fn call_impl(
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&mut self,
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function_index: u32,
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n_args: usize,
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has_return_val: bool,
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is_import: bool,
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) {
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self.inst_base(CALL, n_args, has_return_val);
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fn call_impl(&mut self, function_index: u32, is_import: bool) {
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self.inst_base(CALL);
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if is_import {
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self.import_relocations
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@ -382,14 +370,14 @@ impl<'a> CodeBuilder<'a> {
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);
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}
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instruction_no_args!(drop_, DROP, 1, false);
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instruction_no_args!(select, SELECT, 3, true);
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instruction_no_args!(drop_, DROP);
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instruction_no_args!(select, SELECT);
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pub fn get_local(&mut self, id: LocalId) {
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self.inst_imm32(GETLOCAL, 0, true, id.0);
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self.inst_imm32(GETLOCAL, id.0);
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}
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pub fn set_local(&mut self, id: LocalId) {
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self.inst_imm32(SETLOCAL, 1, false, id.0);
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self.inst_imm32(SETLOCAL, id.0);
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let index = id.0 as usize;
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let len = self.set_locals.len();
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if index >= len {
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@ -404,45 +392,45 @@ impl<'a> CodeBuilder<'a> {
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(index < self.set_locals.len()) && self.set_locals[index]
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}
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pub fn tee_local(&mut self, id: LocalId) {
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self.inst_imm32(TEELOCAL, 0, false, id.0);
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self.inst_imm32(TEELOCAL, id.0);
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}
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pub fn get_global(&mut self, id: u32) {
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self.inst_imm32(GETGLOBAL, 0, true, id);
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self.inst_imm32(GETGLOBAL, id);
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}
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pub fn set_global(&mut self, id: u32) {
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self.inst_imm32(SETGLOBAL, 1, false, id);
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self.inst_imm32(SETGLOBAL, id);
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}
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instruction_memargs!(i32_load, I32LOAD, 1, true);
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instruction_memargs!(i64_load, I64LOAD, 1, true);
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instruction_memargs!(f32_load, F32LOAD, 1, true);
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instruction_memargs!(f64_load, F64LOAD, 1, true);
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instruction_memargs!(i32_load8_s, I32LOAD8S, 1, true);
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instruction_memargs!(i32_load8_u, I32LOAD8U, 1, true);
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instruction_memargs!(i32_load16_s, I32LOAD16S, 1, true);
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instruction_memargs!(i32_load16_u, I32LOAD16U, 1, true);
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instruction_memargs!(i64_load8_s, I64LOAD8S, 1, true);
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instruction_memargs!(i64_load8_u, I64LOAD8U, 1, true);
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instruction_memargs!(i64_load16_s, I64LOAD16S, 1, true);
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instruction_memargs!(i64_load16_u, I64LOAD16U, 1, true);
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instruction_memargs!(i64_load32_s, I64LOAD32S, 1, true);
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instruction_memargs!(i64_load32_u, I64LOAD32U, 1, true);
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instruction_memargs!(i32_store, I32STORE, 2, false);
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instruction_memargs!(i64_store, I64STORE, 2, false);
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instruction_memargs!(f32_store, F32STORE, 2, false);
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instruction_memargs!(f64_store, F64STORE, 2, false);
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instruction_memargs!(i32_store8, I32STORE8, 2, false);
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instruction_memargs!(i32_store16, I32STORE16, 2, false);
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instruction_memargs!(i64_store8, I64STORE8, 2, false);
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instruction_memargs!(i64_store16, I64STORE16, 2, false);
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instruction_memargs!(i64_store32, I64STORE32, 2, false);
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instruction_memargs!(i32_load, I32LOAD);
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instruction_memargs!(i64_load, I64LOAD);
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instruction_memargs!(f32_load, F32LOAD);
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instruction_memargs!(f64_load, F64LOAD);
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instruction_memargs!(i32_load8_s, I32LOAD8S);
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instruction_memargs!(i32_load8_u, I32LOAD8U);
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instruction_memargs!(i32_load16_s, I32LOAD16S);
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instruction_memargs!(i32_load16_u, I32LOAD16U);
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instruction_memargs!(i64_load8_s, I64LOAD8S);
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instruction_memargs!(i64_load8_u, I64LOAD8U);
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instruction_memargs!(i64_load16_s, I64LOAD16S);
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instruction_memargs!(i64_load16_u, I64LOAD16U);
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instruction_memargs!(i64_load32_s, I64LOAD32S);
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instruction_memargs!(i64_load32_u, I64LOAD32U);
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instruction_memargs!(i32_store, I32STORE);
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instruction_memargs!(i64_store, I64STORE);
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instruction_memargs!(f32_store, F32STORE);
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instruction_memargs!(f64_store, F64STORE);
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instruction_memargs!(i32_store8, I32STORE8);
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instruction_memargs!(i32_store16, I32STORE16);
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instruction_memargs!(i64_store8, I64STORE8);
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instruction_memargs!(i64_store16, I64STORE16);
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instruction_memargs!(i64_store32, I64STORE32);
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pub fn memory_size(&mut self) {
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self.inst(CURRENTMEMORY, 0, true);
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self.inst(CURRENTMEMORY);
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self.code.push(0);
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}
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pub fn memory_grow(&mut self) {
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self.inst(GROWMEMORY, 1, true);
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self.inst(GROWMEMORY);
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self.code.push(0);
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}
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@ -453,149 +441,149 @@ impl<'a> CodeBuilder<'a> {
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log_instruction!("{:10}\t{}", format!("{opcode:?}"), x);
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}
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pub fn i32_const(&mut self, x: i32) {
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self.inst_base(I32CONST, 0, true);
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self.inst_base(I32CONST);
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self.code.encode_i32(x);
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self.log_const(I32CONST, x);
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}
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pub fn i64_const(&mut self, x: i64) {
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self.inst_base(I64CONST, 0, true);
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self.inst_base(I64CONST);
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self.code.encode_i64(x);
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self.log_const(I64CONST, x);
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}
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pub fn f32_const(&mut self, x: f32) {
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self.inst_base(F32CONST, 0, true);
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self.inst_base(F32CONST);
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self.code.encode_f32(x);
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self.log_const(F32CONST, x);
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}
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pub fn f64_const(&mut self, x: f64) {
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self.inst_base(F64CONST, 0, true);
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self.inst_base(F64CONST);
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self.code.encode_f64(x);
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self.log_const(F64CONST, x);
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}
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// TODO: Consider creating unified methods for numerical ops like 'eq' and 'add',
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// passing the ValueType as an argument. Could simplify lowlevel code gen.
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instruction_no_args!(i32_eqz, I32EQZ, 1, true);
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instruction_no_args!(i32_eq, I32EQ, 2, true);
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instruction_no_args!(i32_ne, I32NE, 2, true);
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instruction_no_args!(i32_lt_s, I32LTS, 2, true);
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instruction_no_args!(i32_lt_u, I32LTU, 2, true);
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instruction_no_args!(i32_gt_s, I32GTS, 2, true);
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instruction_no_args!(i32_gt_u, I32GTU, 2, true);
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instruction_no_args!(i32_le_s, I32LES, 2, true);
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instruction_no_args!(i32_le_u, I32LEU, 2, true);
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instruction_no_args!(i32_ge_s, I32GES, 2, true);
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instruction_no_args!(i32_ge_u, I32GEU, 2, true);
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instruction_no_args!(i64_eqz, I64EQZ, 1, true);
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instruction_no_args!(i64_eq, I64EQ, 2, true);
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instruction_no_args!(i64_ne, I64NE, 2, true);
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instruction_no_args!(i64_lt_s, I64LTS, 2, true);
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instruction_no_args!(i64_lt_u, I64LTU, 2, true);
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instruction_no_args!(i64_gt_s, I64GTS, 2, true);
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instruction_no_args!(i64_gt_u, I64GTU, 2, true);
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instruction_no_args!(i64_le_s, I64LES, 2, true);
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instruction_no_args!(i64_le_u, I64LEU, 2, true);
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instruction_no_args!(i64_ge_s, I64GES, 2, true);
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instruction_no_args!(i64_ge_u, I64GEU, 2, true);
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instruction_no_args!(f32_eq, F32EQ, 2, true);
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instruction_no_args!(f32_ne, F32NE, 2, true);
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instruction_no_args!(f32_lt, F32LT, 2, true);
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instruction_no_args!(f32_gt, F32GT, 2, true);
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instruction_no_args!(f32_le, F32LE, 2, true);
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instruction_no_args!(f32_ge, F32GE, 2, true);
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instruction_no_args!(f64_eq, F64EQ, 2, true);
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instruction_no_args!(f64_ne, F64NE, 2, true);
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instruction_no_args!(f64_lt, F64LT, 2, true);
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instruction_no_args!(f64_gt, F64GT, 2, true);
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instruction_no_args!(f64_le, F64LE, 2, true);
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instruction_no_args!(f64_ge, F64GE, 2, true);
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instruction_no_args!(i32_clz, I32CLZ, 1, true);
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instruction_no_args!(i32_ctz, I32CTZ, 1, true);
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instruction_no_args!(i32_popcnt, I32POPCNT, 1, true);
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instruction_no_args!(i32_add, I32ADD, 2, true);
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instruction_no_args!(i32_sub, I32SUB, 2, true);
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instruction_no_args!(i32_mul, I32MUL, 2, true);
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instruction_no_args!(i32_div_s, I32DIVS, 2, true);
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instruction_no_args!(i32_div_u, I32DIVU, 2, true);
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instruction_no_args!(i32_rem_s, I32REMS, 2, true);
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instruction_no_args!(i32_rem_u, I32REMU, 2, true);
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instruction_no_args!(i32_and, I32AND, 2, true);
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instruction_no_args!(i32_or, I32OR, 2, true);
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instruction_no_args!(i32_xor, I32XOR, 2, true);
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instruction_no_args!(i32_shl, I32SHL, 2, true);
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instruction_no_args!(i32_shr_s, I32SHRS, 2, true);
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instruction_no_args!(i32_shr_u, I32SHRU, 2, true);
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instruction_no_args!(i32_rotl, I32ROTL, 2, true);
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instruction_no_args!(i32_rotr, I32ROTR, 2, true);
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instruction_no_args!(i64_clz, I64CLZ, 1, true);
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instruction_no_args!(i64_ctz, I64CTZ, 1, true);
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instruction_no_args!(i64_popcnt, I64POPCNT, 1, true);
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instruction_no_args!(i64_add, I64ADD, 2, true);
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instruction_no_args!(i64_sub, I64SUB, 2, true);
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instruction_no_args!(i64_mul, I64MUL, 2, true);
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instruction_no_args!(i64_div_s, I64DIVS, 2, true);
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instruction_no_args!(i64_div_u, I64DIVU, 2, true);
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instruction_no_args!(i64_rem_s, I64REMS, 2, true);
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instruction_no_args!(i64_rem_u, I64REMU, 2, true);
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instruction_no_args!(i64_and, I64AND, 2, true);
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instruction_no_args!(i64_or, I64OR, 2, true);
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instruction_no_args!(i64_xor, I64XOR, 2, true);
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instruction_no_args!(i64_shl, I64SHL, 2, true);
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instruction_no_args!(i64_shr_s, I64SHRS, 2, true);
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instruction_no_args!(i64_shr_u, I64SHRU, 2, true);
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instruction_no_args!(i64_rotl, I64ROTL, 2, true);
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instruction_no_args!(i64_rotr, I64ROTR, 2, true);
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instruction_no_args!(f32_abs, F32ABS, 1, true);
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instruction_no_args!(f32_neg, F32NEG, 1, true);
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instruction_no_args!(f32_ceil, F32CEIL, 1, true);
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instruction_no_args!(f32_floor, F32FLOOR, 1, true);
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instruction_no_args!(f32_trunc, F32TRUNC, 1, true);
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instruction_no_args!(f32_nearest, F32NEAREST, 1, true);
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instruction_no_args!(f32_sqrt, F32SQRT, 1, true);
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instruction_no_args!(f32_add, F32ADD, 2, true);
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instruction_no_args!(f32_sub, F32SUB, 2, true);
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instruction_no_args!(f32_mul, F32MUL, 2, true);
|
||||
instruction_no_args!(f32_div, F32DIV, 2, true);
|
||||
instruction_no_args!(f32_min, F32MIN, 2, true);
|
||||
instruction_no_args!(f32_max, F32MAX, 2, true);
|
||||
instruction_no_args!(f32_copysign, F32COPYSIGN, 2, true);
|
||||
instruction_no_args!(f64_abs, F64ABS, 1, true);
|
||||
instruction_no_args!(f64_neg, F64NEG, 1, true);
|
||||
instruction_no_args!(f64_ceil, F64CEIL, 1, true);
|
||||
instruction_no_args!(f64_floor, F64FLOOR, 1, true);
|
||||
instruction_no_args!(f64_trunc, F64TRUNC, 1, true);
|
||||
instruction_no_args!(f64_nearest, F64NEAREST, 1, true);
|
||||
instruction_no_args!(f64_sqrt, F64SQRT, 1, true);
|
||||
instruction_no_args!(f64_add, F64ADD, 2, true);
|
||||
instruction_no_args!(f64_sub, F64SUB, 2, true);
|
||||
instruction_no_args!(f64_mul, F64MUL, 2, true);
|
||||
instruction_no_args!(f64_div, F64DIV, 2, true);
|
||||
instruction_no_args!(f64_min, F64MIN, 2, true);
|
||||
instruction_no_args!(f64_max, F64MAX, 2, true);
|
||||
instruction_no_args!(f64_copysign, F64COPYSIGN, 2, true);
|
||||
instruction_no_args!(i32_wrap_i64, I32WRAPI64, 1, true);
|
||||
instruction_no_args!(i32_trunc_s_f32, I32TRUNCSF32, 1, true);
|
||||
instruction_no_args!(i32_trunc_u_f32, I32TRUNCUF32, 1, true);
|
||||
instruction_no_args!(i32_trunc_s_f64, I32TRUNCSF64, 1, true);
|
||||
instruction_no_args!(i32_trunc_u_f64, I32TRUNCUF64, 1, true);
|
||||
instruction_no_args!(i64_extend_s_i32, I64EXTENDSI32, 1, true);
|
||||
instruction_no_args!(i64_extend_u_i32, I64EXTENDUI32, 1, true);
|
||||
instruction_no_args!(i64_trunc_s_f32, I64TRUNCSF32, 1, true);
|
||||
instruction_no_args!(i64_trunc_u_f32, I64TRUNCUF32, 1, true);
|
||||
instruction_no_args!(i64_trunc_s_f64, I64TRUNCSF64, 1, true);
|
||||
instruction_no_args!(i64_trunc_u_f64, I64TRUNCUF64, 1, true);
|
||||
instruction_no_args!(f32_convert_s_i32, F32CONVERTSI32, 1, true);
|
||||
instruction_no_args!(f32_convert_u_i32, F32CONVERTUI32, 1, true);
|
||||
instruction_no_args!(f32_convert_s_i64, F32CONVERTSI64, 1, true);
|
||||
instruction_no_args!(f32_convert_u_i64, F32CONVERTUI64, 1, true);
|
||||
instruction_no_args!(f32_demote_f64, F32DEMOTEF64, 1, true);
|
||||
instruction_no_args!(f64_convert_s_i32, F64CONVERTSI32, 1, true);
|
||||
instruction_no_args!(f64_convert_u_i32, F64CONVERTUI32, 1, true);
|
||||
instruction_no_args!(f64_convert_s_i64, F64CONVERTSI64, 1, true);
|
||||
instruction_no_args!(f64_convert_u_i64, F64CONVERTUI64, 1, true);
|
||||
instruction_no_args!(f64_promote_f32, F64PROMOTEF32, 1, true);
|
||||
instruction_no_args!(i32_reinterpret_f32, I32REINTERPRETF32, 1, true);
|
||||
instruction_no_args!(i64_reinterpret_f64, I64REINTERPRETF64, 1, true);
|
||||
instruction_no_args!(f32_reinterpret_i32, F32REINTERPRETI32, 1, true);
|
||||
instruction_no_args!(f64_reinterpret_i64, F64REINTERPRETI64, 1, true);
|
||||
instruction_no_args!(i32_eqz, I32EQZ);
|
||||
instruction_no_args!(i32_eq, I32EQ);
|
||||
instruction_no_args!(i32_ne, I32NE);
|
||||
instruction_no_args!(i32_lt_s, I32LTS);
|
||||
instruction_no_args!(i32_lt_u, I32LTU);
|
||||
instruction_no_args!(i32_gt_s, I32GTS);
|
||||
instruction_no_args!(i32_gt_u, I32GTU);
|
||||
instruction_no_args!(i32_le_s, I32LES);
|
||||
instruction_no_args!(i32_le_u, I32LEU);
|
||||
instruction_no_args!(i32_ge_s, I32GES);
|
||||
instruction_no_args!(i32_ge_u, I32GEU);
|
||||
instruction_no_args!(i64_eqz, I64EQZ);
|
||||
instruction_no_args!(i64_eq, I64EQ);
|
||||
instruction_no_args!(i64_ne, I64NE);
|
||||
instruction_no_args!(i64_lt_s, I64LTS);
|
||||
instruction_no_args!(i64_lt_u, I64LTU);
|
||||
instruction_no_args!(i64_gt_s, I64GTS);
|
||||
instruction_no_args!(i64_gt_u, I64GTU);
|
||||
instruction_no_args!(i64_le_s, I64LES);
|
||||
instruction_no_args!(i64_le_u, I64LEU);
|
||||
instruction_no_args!(i64_ge_s, I64GES);
|
||||
instruction_no_args!(i64_ge_u, I64GEU);
|
||||
instruction_no_args!(f32_eq, F32EQ);
|
||||
instruction_no_args!(f32_ne, F32NE);
|
||||
instruction_no_args!(f32_lt, F32LT);
|
||||
instruction_no_args!(f32_gt, F32GT);
|
||||
instruction_no_args!(f32_le, F32LE);
|
||||
instruction_no_args!(f32_ge, F32GE);
|
||||
instruction_no_args!(f64_eq, F64EQ);
|
||||
instruction_no_args!(f64_ne, F64NE);
|
||||
instruction_no_args!(f64_lt, F64LT);
|
||||
instruction_no_args!(f64_gt, F64GT);
|
||||
instruction_no_args!(f64_le, F64LE);
|
||||
instruction_no_args!(f64_ge, F64GE);
|
||||
instruction_no_args!(i32_clz, I32CLZ);
|
||||
instruction_no_args!(i32_ctz, I32CTZ);
|
||||
instruction_no_args!(i32_popcnt, I32POPCNT);
|
||||
instruction_no_args!(i32_add, I32ADD);
|
||||
instruction_no_args!(i32_sub, I32SUB);
|
||||
instruction_no_args!(i32_mul, I32MUL);
|
||||
instruction_no_args!(i32_div_s, I32DIVS);
|
||||
instruction_no_args!(i32_div_u, I32DIVU);
|
||||
instruction_no_args!(i32_rem_s, I32REMS);
|
||||
instruction_no_args!(i32_rem_u, I32REMU);
|
||||
instruction_no_args!(i32_and, I32AND);
|
||||
instruction_no_args!(i32_or, I32OR);
|
||||
instruction_no_args!(i32_xor, I32XOR);
|
||||
instruction_no_args!(i32_shl, I32SHL);
|
||||
instruction_no_args!(i32_shr_s, I32SHRS);
|
||||
instruction_no_args!(i32_shr_u, I32SHRU);
|
||||
instruction_no_args!(i32_rotl, I32ROTL);
|
||||
instruction_no_args!(i32_rotr, I32ROTR);
|
||||
instruction_no_args!(i64_clz, I64CLZ);
|
||||
instruction_no_args!(i64_ctz, I64CTZ);
|
||||
instruction_no_args!(i64_popcnt, I64POPCNT);
|
||||
instruction_no_args!(i64_add, I64ADD);
|
||||
instruction_no_args!(i64_sub, I64SUB);
|
||||
instruction_no_args!(i64_mul, I64MUL);
|
||||
instruction_no_args!(i64_div_s, I64DIVS);
|
||||
instruction_no_args!(i64_div_u, I64DIVU);
|
||||
instruction_no_args!(i64_rem_s, I64REMS);
|
||||
instruction_no_args!(i64_rem_u, I64REMU);
|
||||
instruction_no_args!(i64_and, I64AND);
|
||||
instruction_no_args!(i64_or, I64OR);
|
||||
instruction_no_args!(i64_xor, I64XOR);
|
||||
instruction_no_args!(i64_shl, I64SHL);
|
||||
instruction_no_args!(i64_shr_s, I64SHRS);
|
||||
instruction_no_args!(i64_shr_u, I64SHRU);
|
||||
instruction_no_args!(i64_rotl, I64ROTL);
|
||||
instruction_no_args!(i64_rotr, I64ROTR);
|
||||
instruction_no_args!(f32_abs, F32ABS);
|
||||
instruction_no_args!(f32_neg, F32NEG);
|
||||
instruction_no_args!(f32_ceil, F32CEIL);
|
||||
instruction_no_args!(f32_floor, F32FLOOR);
|
||||
instruction_no_args!(f32_trunc, F32TRUNC);
|
||||
instruction_no_args!(f32_nearest, F32NEAREST);
|
||||
instruction_no_args!(f32_sqrt, F32SQRT);
|
||||
instruction_no_args!(f32_add, F32ADD);
|
||||
instruction_no_args!(f32_sub, F32SUB);
|
||||
instruction_no_args!(f32_mul, F32MUL);
|
||||
instruction_no_args!(f32_div, F32DIV);
|
||||
instruction_no_args!(f32_min, F32MIN);
|
||||
instruction_no_args!(f32_max, F32MAX);
|
||||
instruction_no_args!(f32_copysign, F32COPYSIGN);
|
||||
instruction_no_args!(f64_abs, F64ABS);
|
||||
instruction_no_args!(f64_neg, F64NEG);
|
||||
instruction_no_args!(f64_ceil, F64CEIL);
|
||||
instruction_no_args!(f64_floor, F64FLOOR);
|
||||
instruction_no_args!(f64_trunc, F64TRUNC);
|
||||
instruction_no_args!(f64_nearest, F64NEAREST);
|
||||
instruction_no_args!(f64_sqrt, F64SQRT);
|
||||
instruction_no_args!(f64_add, F64ADD);
|
||||
instruction_no_args!(f64_sub, F64SUB);
|
||||
instruction_no_args!(f64_mul, F64MUL);
|
||||
instruction_no_args!(f64_div, F64DIV);
|
||||
instruction_no_args!(f64_min, F64MIN);
|
||||
instruction_no_args!(f64_max, F64MAX);
|
||||
instruction_no_args!(f64_copysign, F64COPYSIGN);
|
||||
instruction_no_args!(i32_wrap_i64, I32WRAPI64);
|
||||
instruction_no_args!(i32_trunc_s_f32, I32TRUNCSF32);
|
||||
instruction_no_args!(i32_trunc_u_f32, I32TRUNCUF32);
|
||||
instruction_no_args!(i32_trunc_s_f64, I32TRUNCSF64);
|
||||
instruction_no_args!(i32_trunc_u_f64, I32TRUNCUF64);
|
||||
instruction_no_args!(i64_extend_s_i32, I64EXTENDSI32);
|
||||
instruction_no_args!(i64_extend_u_i32, I64EXTENDUI32);
|
||||
instruction_no_args!(i64_trunc_s_f32, I64TRUNCSF32);
|
||||
instruction_no_args!(i64_trunc_u_f32, I64TRUNCUF32);
|
||||
instruction_no_args!(i64_trunc_s_f64, I64TRUNCSF64);
|
||||
instruction_no_args!(i64_trunc_u_f64, I64TRUNCUF64);
|
||||
instruction_no_args!(f32_convert_s_i32, F32CONVERTSI32);
|
||||
instruction_no_args!(f32_convert_u_i32, F32CONVERTUI32);
|
||||
instruction_no_args!(f32_convert_s_i64, F32CONVERTSI64);
|
||||
instruction_no_args!(f32_convert_u_i64, F32CONVERTUI64);
|
||||
instruction_no_args!(f32_demote_f64, F32DEMOTEF64);
|
||||
instruction_no_args!(f64_convert_s_i32, F64CONVERTSI32);
|
||||
instruction_no_args!(f64_convert_u_i32, F64CONVERTUI32);
|
||||
instruction_no_args!(f64_convert_s_i64, F64CONVERTSI64);
|
||||
instruction_no_args!(f64_convert_u_i64, F64CONVERTUI64);
|
||||
instruction_no_args!(f64_promote_f32, F64PROMOTEF32);
|
||||
instruction_no_args!(i32_reinterpret_f32, I32REINTERPRETF32);
|
||||
instruction_no_args!(i64_reinterpret_f64, I64REINTERPRETF64);
|
||||
instruction_no_args!(f32_reinterpret_i32, F32REINTERPRETI32);
|
||||
instruction_no_args!(f64_reinterpret_i64, F64REINTERPRETI64);
|
||||
}
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue