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Add aarch64 signed_compare_reg64 and unsigned_compare_reg64

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Ajai Nelson 2023-04-09 12:53:28 -04:00
parent f9e31b828b
commit 5f831b6f50
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GPG key ID: 5744FCFB528CB779
1 changed files with 26 additions and 12 deletions
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38
crates/compiler/gen_dev/src/generic64/aarch64.rs
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@ -1051,25 +1051,39 @@ impl Assembler<AArch64GeneralReg, AArch64FloatReg> for AArch64Assembler {
}
fn signed_compare_reg64(
_buf: &mut Vec<'_, u8>,
buf: &mut Vec<'_, u8>,
_register_width: RegisterWidth,
_operation: CompareOperation,
_dst: AArch64GeneralReg,
_src1: AArch64GeneralReg,
_src2: AArch64GeneralReg,
operation: CompareOperation,
dst: AArch64GeneralReg,
src1: AArch64GeneralReg,
src2: AArch64GeneralReg,
) {
todo!("signed compare")
cmp_reg64_reg64(buf, src1, src2);
let cond = match operation {
CompareOperation::LessThan => ConditionCode::LT,
CompareOperation::LessThanOrEqual => ConditionCode::LE,
CompareOperation::GreaterThan => ConditionCode::GT,
CompareOperation::GreaterThanOrEqual => ConditionCode::GE,
};
cset_reg64_cond(buf, dst, cond);
}
fn unsigned_compare_reg64(
_buf: &mut Vec<'_, u8>,
buf: &mut Vec<'_, u8>,
_register_width: RegisterWidth,
_operation: CompareOperation,
_dst: AArch64GeneralReg,
_src1: AArch64GeneralReg,
_src2: AArch64GeneralReg,
operation: CompareOperation,
dst: AArch64GeneralReg,
src1: AArch64GeneralReg,
src2: AArch64GeneralReg,
) {
todo!("unsigned compare")
cmp_reg64_reg64(buf, src1, src2);
let cond = match operation {
CompareOperation::LessThan => ConditionCode::CCLO,
CompareOperation::LessThanOrEqual => ConditionCode::LS,
CompareOperation::GreaterThan => ConditionCode::HI,
CompareOperation::GreaterThanOrEqual => ConditionCode::CSHS,
};
cset_reg64_cond(buf, dst, cond);
}
}