diff --git a/crates/compiler/gen_dev/src/generic64/aarch64.rs b/crates/compiler/gen_dev/src/generic64/aarch64.rs
index c52c119a05..63eb665947 100644
--- a/crates/compiler/gen_dev/src/generic64/aarch64.rs
+++ b/crates/compiler/gen_dev/src/generic64/aarch64.rs
@@ -385,19 +385,6 @@ impl CallConv<AArch64GeneralReg, AArch64FloatReg, AArch64Assembler> for AArch64C
 
         if let Some(aligned_stack_size) = full_stack_size.checked_add(offset as i32) {
             if aligned_stack_size > 0 {
-                //                // mov x29, sp
-                //                AArch64Assembler::mov_reg64_reg64(
-                //                    buf,
-                //                    AArch64GeneralReg::FP,
-                //                    AArch64GeneralReg::ZRSP,
-                //                );
-                AArch64Assembler::sub_reg64_reg64_imm32(
-                    buf,
-                    AArch64GeneralReg::FP,
-                    AArch64GeneralReg::ZRSP,
-                    0,
-                );
-
                 // sub     sp, sp, #0x10
                 AArch64Assembler::sub_reg64_reg64_imm32(
                     buf,
@@ -413,6 +400,12 @@ impl CallConv<AArch64GeneralReg, AArch64FloatReg, AArch64Assembler> for AArch64C
                 offset -= 8;
                 AArch64Assembler::mov_stack32_reg64(buf, offset, AArch64GeneralReg::FP);
 
+                AArch64Assembler::mov_reg64_reg64(
+                    buf,
+                    AArch64GeneralReg::FP,
+                    AArch64GeneralReg::ZRSP,
+                );
+
                 offset = aligned_stack_size - fn_call_stack_size;
                 for reg in saved_general_regs {
                     offset -= 8;