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fix how registers are stored/loaded before a function call

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Folkert 2023-10-08 20:30:20 +02:00
parent 6510591b60
commit 734cfe9bce
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1 changed files with 6 additions and 6 deletions
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12
crates/compiler/gen_dev/src/generic64/aarch64.rs
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@ -449,14 +449,14 @@ impl CallConv<AArch64GeneralReg, AArch64FloatReg, AArch64Assembler> for AArch64C
w - 16, w - 16,
); );
let mut offset = aligned_stack_size - fn_call_stack_size; let mut offset = aligned_stack_size - fn_call_stack_size - 16;
for reg in saved_general_regs { for reg in saved_general_regs {
offset -= 8;
AArch64Assembler::mov_base32_reg64(buf, offset, *reg); AArch64Assembler::mov_base32_reg64(buf, offset, *reg);
offset -= 8;
} }
for reg in saved_float_regs { for reg in saved_float_regs {
offset -= 8;
AArch64Assembler::mov_base32_freg64(buf, offset, *reg); AArch64Assembler::mov_base32_freg64(buf, offset, *reg);
offset -= 8;
} }
aligned_stack_size aligned_stack_size
} else { } else {
@ -481,14 +481,14 @@ impl CallConv<AArch64GeneralReg, AArch64FloatReg, AArch64Assembler> for AArch64C
AArch64Assembler::mov_reg64_stack32(buf, AArch64GeneralReg::FP, w - 0x10); AArch64Assembler::mov_reg64_stack32(buf, AArch64GeneralReg::FP, w - 0x10);
AArch64Assembler::mov_reg64_stack32(buf, AArch64GeneralReg::LR, w - 0x08); AArch64Assembler::mov_reg64_stack32(buf, AArch64GeneralReg::LR, w - 0x08);
let mut offset = aligned_stack_size - fn_call_stack_size; let mut offset = aligned_stack_size - fn_call_stack_size - 16;
for reg in saved_general_regs { for reg in saved_general_regs {
offset -= 8;
AArch64Assembler::mov_reg64_base32(buf, *reg, offset); AArch64Assembler::mov_reg64_base32(buf, *reg, offset);
offset -= 8;
} }
for reg in saved_float_regs { for reg in saved_float_regs {
offset -= 8;
AArch64Assembler::mov_freg64_base32(buf, *reg, offset); AArch64Assembler::mov_freg64_base32(buf, *reg, offset);
offset -= 8;
} }
AArch64Assembler::add_reg64_reg64_imm32( AArch64Assembler::add_reg64_reg64_imm32(
buf, buf,