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better extract musl lib
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parent
159f95aad1
commit
77624f627b
5 changed files with 65 additions and 31 deletions
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@ -1,7 +1,7 @@
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const std = @import("std");
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const builtin = @import("builtin");
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const arch = builtin.cpu.arch;
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const musl_memcpy = @import("libc/musl/memcpy.zig");
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const musl = @import("libc/musl.zig");
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const cpuid = @import("libc/cpuid.zig");
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comptime {
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@ -14,7 +14,7 @@ const Memcpy = fn (noalias [*]u8, noalias [*]const u8, len: usize) callconv(.C)
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pub var memcpy_target: Memcpy = switch (arch) {
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// TODO(): Switch to dispatch_memcpy once the surgical linker can support it.
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// .x86_64 => dispatch_memcpy,
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.x86_64 => musl_memcpy.musl_memcpy,
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.x86_64 => musl.memcpy,
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else => unreachable,
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};
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@ -47,9 +47,13 @@ fn dispatch_memcpy(noalias dest: [*]u8, noalias src: [*]const u8, len: usize) ca
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switch (arch) {
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.x86_64 => {
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if (cpuid.supports_avx2()) {
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memcpy_target = musl_memcpy.musl_memcpy;
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if (cpuid.supports_prefetchw()) {
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memcpy_target = musl.memcpy;
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} else {
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memcpy_target = musl.memcpy;
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}
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} else {
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memcpy_target = musl_memcpy.musl_memcpy;
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memcpy_target = musl.memcpy;
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}
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},
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else => unreachable,
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@ -2,7 +2,7 @@ const builtin = @import("builtin");
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const arch = builtin.cpu.arch;
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// I couldn't manage to define this in a PIE friendly way with inline assembly.
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// Instead, I am definining it as a global assembly function.
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// Instead, I am definining it as global assembly functions.
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comptime {
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switch (arch) {
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.x86_64 => {
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@ -20,17 +20,44 @@ comptime {
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\\ mov $0, %ecx
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\\ cpuid
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\\
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\\ # Check if the AVX2 feature flag is set.
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\\ # The AVX2 feature flag is located in the EBX register at bit 5.
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\\ bt $5, %ebx
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\\ jc .AVX2Supported
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\\ jc .avx2_supported
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\\
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\\ # AVX2 is not supported.
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\\ pop %rbx
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\\ mov $0, %eax
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\\ ret
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\\
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\\ .AVX2Supported:
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\\ .avx2_supported:
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\\ pop %rbx
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\\ mov $1, %eax
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\\ ret
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);
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asm (
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\\ # Check if prefetchw is supported.
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\\ # Returns 1 if the prefetchw instruction is supported, 0 otherwise.
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\\ .global supports_prefetchw;
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\\ supports_prefetchw:
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\\ # Save the EBX register.
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\\ push %rbx
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\\
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\\ # Call the CPUID instruction with the EAX register set to 0x80000001 and ECX set to 0.
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\\ # This will get the CPUID information for the current CPU.
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\\ mov $0x80000001, %eax
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\\ mov $0, %ecx
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\\ cpuid
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\\
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\\ # The prefetchw feature flag is located in the ECX register at bit 8.
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\\ bt $8, %ecx
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\\ jc .prefetchw_supported
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\\
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\\ # AVX2 is not supported.
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\\ pop %rbx
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\\ mov $0, %eax
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\\ ret
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\\
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\\ .prefetchw_supported:
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\\ pop %rbx
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\\ mov $1, %eax
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\\ ret
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@ -41,3 +68,4 @@ comptime {
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}
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pub extern fn supports_avx2() bool;
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pub extern fn supports_prefetchw() bool;
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1
crates/compiler/builtins/bitcode/src/libc/musl.zig
Normal file
1
crates/compiler/builtins/bitcode/src/libc/musl.zig
Normal file
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@ -0,0 +1 @@
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pub const memcpy = @import("musl/memcpy.zig").musl_memcpy;
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@ -0,0 +1,23 @@
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.global musl_memcpy
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# Windows does not support the type directive.
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# .type memcpy,@function
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musl_memcpy:
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mov %rdi,%rax
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cmp $8,%rdx
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jc 1f
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test $7,%edi
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jz 1f
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2: movsb
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dec %rdx
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test $7,%edi
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jnz 2b
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1: mov %rdx,%rcx
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shr $3,%rcx
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rep
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movsq
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and $7,%edx
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jz 1f
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2: movsb
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dec %edx
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jnz 2b
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1: ret
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@ -4,29 +4,7 @@ const arch = builtin.cpu.arch;
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comptime {
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switch (arch) {
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.x86_64 => {
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asm (
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\\ .global musl_memcpy;
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\\ musl_memcpy:
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\\ mov %rdi,%rax
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\\ cmp $8,%rdx
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\\ jc 1f
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\\ test $7,%edi
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\\ jz 1f
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\\ 2: movsb
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\\ dec %rdx
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\\ test $7,%edi
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\\ jnz 2b
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\\ 1: mov %rdx,%rcx
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\\ shr $3,%rcx
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\\ rep
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\\ movsq
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\\ and $7,%edx
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\\ jz 1f
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\\ 2: movsb
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\\ dec %edx
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\\ jnz 2b
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\\ 1: ret
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);
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asm (@embedFile("memcpy-x86_64.S"));
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},
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else => unreachable,
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}
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