language-servers/roc
1
0
Fork 0
mirror of https://github.com/roc-lang/roc.git synced 2025-09-29 14:54:47 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions 7

Wasm: avoid two memory loads for ListLen, at the cost of +1 instruction byte

Browse source
This commit is contained in:
Brian Carroll 2021-12-30 15:40:55 +00:00
parent 0912f8fd45
commit 83d6c82e0b
1 changed files with 5 additions and 8 deletions
Download patch file Download diff file Expand all files Collapse all files

13
compiler/gen_wasm/src/low_level.rs
View file

@ -69,14 +69,11 @@ pub fn dispatch_low_level<'a>(
// List
ListLen => {
if let StoredValue::StackMemory { location, .. } = storage.get(&args[0]) {
let (local_id, offset) = location.local_and_offset(storage.stack_frame_pointer);
code_builder.get_local(local_id);
code_builder.i32_load(Align::Bytes4, offset + 4);
} else {
internal_error!("Unexpected storage for {:?}", args[0]);
};
// List structure has already been loaded as i64 (Zig calling convention)
// We want the second (more significant) 32 bits. Shift and convert to i32.
code_builder.i64_const(32);
code_builder.i64_shr_u();
code_builder.i32_wrap_i64();
}
ListGetUnsafe | ListSet | ListSingle | ListRepeat | ListReverse | ListConcat