language-servers/roc
1
0
Fork 0
mirror of https://github.com/roc-lang/roc.git synced 2025-09-27 05:49:08 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions 6

another simplification

Browse source
This commit is contained in:
Folkert 2023-09-15 21:18:46 +02:00
parent e33414938d
commit ae296a92b7
No known key found for this signature in database
GPG key ID: 1F17F6FFD112B97C
3 changed files with 40 additions and 33 deletions
Download patch file Download diff file Expand all files Collapse all files

22
crates/compiler/gen_dev/src/generic64/aarch64.rs
View file

@ -1272,21 +1272,13 @@ impl Assembler<AArch64GeneralReg, AArch64FloatReg> for AArch64Assembler {
}
#[inline(always)]
fn mov_base32_reg64(buf: &mut Vec<'_, u8>, offset: i32, src: AArch64GeneralReg) {
Self::mov_mem64_offset32_reg64(buf, AArch64GeneralReg::FP, offset, src)
}
#[inline(always)]
fn mov_base32_reg32(_buf: &mut Vec<'_, u8>, _offset: i32, _src: AArch64GeneralReg) {
todo!()
}
#[inline(always)]
fn mov_base32_reg16(_buf: &mut Vec<'_, u8>, _offset: i32, _src: AArch64GeneralReg) {
todo!()
}
#[inline(always)]
fn mov_base32_reg8(_buf: &mut Vec<'_, u8>, _offset: i32, _src: AArch64GeneralReg) {
todo!()
fn mov_base32_reg(
buf: &mut Vec<'_, u8>,
register_width: RegisterWidth,
offset: i32,
src: AArch64GeneralReg,
) {
Self::mov_mem_offset32_reg(buf, register_width, AArch64GeneralReg::FP, offset, src)
}
fn mov_mem_offset32_reg(

23
crates/compiler/gen_dev/src/generic64/mod.rs
View file

@ -352,10 +352,25 @@ pub trait Assembler<GeneralReg: RegTrait, FloatReg: RegTrait>: Sized + Copy {
fn mov_base32_freg64(buf: &mut Vec<'_, u8>, offset: i32, src: FloatReg);
fn mov_base32_freg32(buf: &mut Vec<'_, u8>, offset: i32, src: FloatReg);
fn mov_base32_reg64(buf: &mut Vec<'_, u8>, offset: i32, src: GeneralReg);
fn mov_base32_reg32(buf: &mut Vec<'_, u8>, offset: i32, src: GeneralReg);
fn mov_base32_reg16(buf: &mut Vec<'_, u8>, offset: i32, src: GeneralReg);
fn mov_base32_reg8(buf: &mut Vec<'_, u8>, offset: i32, src: GeneralReg);
fn mov_base32_reg(
buf: &mut Vec<'_, u8>,
register_width: RegisterWidth,
offset: i32,
src: GeneralReg,
);
fn mov_base32_reg64(buf: &mut Vec<'_, u8>, offset: i32, src: GeneralReg) {
Self::mov_base32_reg(buf, RegisterWidth::W64, offset, src)
}
fn mov_base32_reg32(buf: &mut Vec<'_, u8>, offset: i32, src: GeneralReg) {
Self::mov_base32_reg(buf, RegisterWidth::W32, offset, src)
}
fn mov_base32_reg16(buf: &mut Vec<'_, u8>, offset: i32, src: GeneralReg) {
Self::mov_base32_reg(buf, RegisterWidth::W16, offset, src)
}
fn mov_base32_reg8(buf: &mut Vec<'_, u8>, offset: i32, src: GeneralReg) {
Self::mov_base32_reg(buf, RegisterWidth::W8, offset, src)
}
// move from memory (a pointer) to register
fn mov_reg_mem_offset32(

28
crates/compiler/gen_dev/src/generic64/x86_64.rs
View file

@ -2294,20 +2294,20 @@ impl Assembler<X86_64GeneralReg, X86_64FloatReg> for X86_64Assembler {
}
#[inline(always)]
fn mov_base32_reg64(buf: &mut Vec<'_, u8>, offset: i32, src: X86_64GeneralReg) {
mov_base64_offset32_reg64(buf, X86_64GeneralReg::RBP, offset, src)
}
#[inline(always)]
fn mov_base32_reg32(buf: &mut Vec<'_, u8>, offset: i32, src: X86_64GeneralReg) {
mov_base32_offset32_reg32(buf, X86_64GeneralReg::RBP, offset, src)
}
#[inline(always)]
fn mov_base32_reg16(buf: &mut Vec<'_, u8>, offset: i32, src: X86_64GeneralReg) {
mov_base16_offset32_reg16(buf, X86_64GeneralReg::RBP, offset, src)
}
#[inline(always)]
fn mov_base32_reg8(buf: &mut Vec<'_, u8>, offset: i32, src: X86_64GeneralReg) {
mov_base8_offset32_reg8(buf, X86_64GeneralReg::RBP, offset, src)
fn mov_base32_reg(
buf: &mut Vec<'_, u8>,
register_width: RegisterWidth,
offset: i32,
src: X86_64GeneralReg,
) {
use RegisterWidth::*;
match register_width {
W8 => mov_base8_offset32_reg8(buf, X86_64GeneralReg::RBP, offset, src),
W16 => mov_base16_offset32_reg16(buf, X86_64GeneralReg::RBP, offset, src),
W32 => mov_base32_offset32_reg32(buf, X86_64GeneralReg::RBP, offset, src),
W64 => mov_base64_offset32_reg64(buf, X86_64GeneralReg::RBP, offset, src),
}
}
#[inline(always)]