From c1d0af5b3916bf176d942ac35b4552e149fc340d Mon Sep 17 00:00:00 2001 From: Folkert Date: Tue, 9 Mar 2021 20:19:34 +0100 Subject: [PATCH] make things compile/run --- compiler/gen/src/llvm/build.rs | 3 --- compiler/gen_dev/src/generic64/mod.rs | 2 +- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/compiler/gen/src/llvm/build.rs b/compiler/gen/src/llvm/build.rs index 98386c2270..1beb7372cb 100644 --- a/compiler/gen/src/llvm/build.rs +++ b/compiler/gen/src/llvm/build.rs @@ -2492,9 +2492,6 @@ struct SwitchArgsIr<'a, 'ctx> { } fn const_i128<'a, 'ctx, 'env>(env: &Env<'a, 'ctx, 'env>, value: i128) -> IntValue<'ctx> { - // TODO verify the order [a, b] is correct for larger numbers when we can parse them - debug_assert!(value <= i64::MAX as i128); - // truncate the lower 64 bits let value = value as u128; let a = value as u64; diff --git a/compiler/gen_dev/src/generic64/mod.rs b/compiler/gen_dev/src/generic64/mod.rs index b734f5450f..672c8678b6 100644 --- a/compiler/gen_dev/src/generic64/mod.rs +++ b/compiler/gen_dev/src/generic64/mod.rs @@ -520,7 +520,7 @@ impl< Literal::Int(x) => { let reg = self.claim_general_reg(sym)?; let val = *x; - ASM::mov_reg64_imm64(&mut self.buf, reg, val); + ASM::mov_reg64_imm64(&mut self.buf, reg, val as i64); Ok(()) } Literal::Float(x) => {