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https://github.com/roc-lang/roc.git
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Demo glue for closures
This commit is contained in:
Richard Feldman
parent
b3f9ff562d
commit
ca8a5983a5
4 changed files with 441 additions and 8 deletions
407
examples/platform-switching/rust-platform/src/glue.rs
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407
examples/platform-switching/rust-platform/src/glue.rs
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// ⚠️ GENERATED CODE ⚠️ - this entire file was generated by the `roc glue` CLI command
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#![allow(unused_unsafe)]
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#![allow(dead_code)]
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#![allow(unused_mut)]
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#![allow(non_snake_case)]
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#![allow(non_camel_case_types)]
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#![allow(non_upper_case_globals)]
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#![allow(clippy::undocumented_unsafe_blocks)]
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#![allow(clippy::redundant_static_lifetimes)]
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#![allow(clippy::unused_unit)]
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#![allow(clippy::missing_safety_doc)]
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#![allow(clippy::let_and_return)]
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#![allow(clippy::missing_safety_doc)]
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#![allow(clippy::redundant_static_lifetimes)]
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#![allow(clippy::needless_borrow)]
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#![allow(clippy::clone_on_copy)]
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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#[derive(Clone, Copy, PartialEq, PartialOrd, Eq, Ord, Hash)]
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#[repr(u8)]
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pub enum discriminant_Op {
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StderrWrite = 0,
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StdoutWrite = 1,
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}
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impl core::fmt::Debug for discriminant_Op {
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fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
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match self {
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Self::StderrWrite => f.write_str("discriminant_Op::StderrWrite"),
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Self::StdoutWrite => f.write_str("discriminant_Op::StdoutWrite"),
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}
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}
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}
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#[cfg(any(
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target_arch = "arm",
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target_arch = "wasm32",
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target_arch = "x86"
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))]
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#[repr(C)]
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pub union Op {
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StderrWrite: core::mem::ManuallyDrop<roc_std::RocStr>,
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StdoutWrite: core::mem::ManuallyDrop<roc_std::RocStr>,
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_sizer: [u8; 16],
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}
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#[cfg(any(
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target_arch = "aarch64",
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target_arch = "x86_64"
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))]
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#[repr(C)]
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pub union Op {
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StderrWrite: core::mem::ManuallyDrop<roc_std::RocStr>,
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StdoutWrite: core::mem::ManuallyDrop<roc_std::RocStr>,
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_sizer: [u8; 32],
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}
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impl Op {
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#[cfg(any(
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target_arch = "arm",
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target_arch = "wasm32",
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target_arch = "x86"
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))]
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/// Returns which variant this tag union holds. Note that this never includes a payload!
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pub fn discriminant(&self) -> discriminant_Op {
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unsafe {
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let bytes = core::mem::transmute::<&Self, &[u8; core::mem::size_of::<Self>()]>(self);
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core::mem::transmute::<u8, discriminant_Op>(*bytes.as_ptr().add(12))
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}
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}
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#[cfg(any(
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target_arch = "arm",
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target_arch = "wasm32",
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target_arch = "x86"
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))]
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/// Internal helper
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fn set_discriminant(&mut self, discriminant: discriminant_Op) {
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let discriminant_ptr: *mut discriminant_Op = (self as *mut Op).cast();
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unsafe {
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*(discriminant_ptr.add(12)) = discriminant;
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}
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}
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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/// Construct a tag named `StderrWrite`, with the appropriate payload
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pub fn StderrWrite(arg: roc_std::RocStr) -> Self {
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let mut answer = Self {
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StderrWrite: core::mem::ManuallyDrop::new(arg)
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};
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answer.set_discriminant(discriminant_Op::StderrWrite);
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answer
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}
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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/// Unsafely assume the given `Op` has a `.discriminant()` of `StderrWrite` and convert it to `StderrWrite`'s payload.
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/// (Always examine `.discriminant()` first to make sure this is the correct variant!)
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/// Panics in debug builds if the `.discriminant()` doesn't return `StderrWrite`.
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pub unsafe fn into_StderrWrite(mut self) -> roc_std::RocStr {
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debug_assert_eq!(self.discriminant(), discriminant_Op::StderrWrite);
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let payload = {
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let mut uninitialized = core::mem::MaybeUninit::uninit();
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let swapped = unsafe {
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core::mem::replace(
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&mut self.StderrWrite,
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core::mem::ManuallyDrop::new(uninitialized.assume_init()),
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)
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};
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core::mem::forget(self);
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core::mem::ManuallyDrop::into_inner(swapped)
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};
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payload
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}
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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/// Unsafely assume the given `Op` has a `.discriminant()` of `StderrWrite` and return its payload.
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/// (Always examine `.discriminant()` first to make sure this is the correct variant!)
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/// Panics in debug builds if the `.discriminant()` doesn't return `StderrWrite`.
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pub unsafe fn as_StderrWrite(&self) -> &roc_std::RocStr {
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debug_assert_eq!(self.discriminant(), discriminant_Op::StderrWrite);
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let payload = &self.StderrWrite;
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&payload
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}
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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/// Construct a tag named `StdoutWrite`, with the appropriate payload
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pub fn StdoutWrite(arg: roc_std::RocStr) -> Self {
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let mut answer = Self {
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StdoutWrite: core::mem::ManuallyDrop::new(arg)
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};
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answer.set_discriminant(discriminant_Op::StdoutWrite);
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answer
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}
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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/// Unsafely assume the given `Op` has a `.discriminant()` of `StdoutWrite` and convert it to `StdoutWrite`'s payload.
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/// (Always examine `.discriminant()` first to make sure this is the correct variant!)
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/// Panics in debug builds if the `.discriminant()` doesn't return `StdoutWrite`.
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pub unsafe fn into_StdoutWrite(mut self) -> roc_std::RocStr {
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debug_assert_eq!(self.discriminant(), discriminant_Op::StdoutWrite);
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let payload = {
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let mut uninitialized = core::mem::MaybeUninit::uninit();
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let swapped = unsafe {
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core::mem::replace(
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&mut self.StdoutWrite,
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core::mem::ManuallyDrop::new(uninitialized.assume_init()),
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)
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};
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core::mem::forget(self);
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core::mem::ManuallyDrop::into_inner(swapped)
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};
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payload
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}
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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/// Unsafely assume the given `Op` has a `.discriminant()` of `StdoutWrite` and return its payload.
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/// (Always examine `.discriminant()` first to make sure this is the correct variant!)
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/// Panics in debug builds if the `.discriminant()` doesn't return `StdoutWrite`.
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pub unsafe fn as_StdoutWrite(&self) -> &roc_std::RocStr {
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debug_assert_eq!(self.discriminant(), discriminant_Op::StdoutWrite);
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let payload = &self.StdoutWrite;
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&payload
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}
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#[cfg(any(
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target_arch = "aarch64",
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target_arch = "x86_64"
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))]
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/// Returns which variant this tag union holds. Note that this never includes a payload!
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pub fn discriminant(&self) -> discriminant_Op {
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unsafe {
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let bytes = core::mem::transmute::<&Self, &[u8; core::mem::size_of::<Self>()]>(self);
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core::mem::transmute::<u8, discriminant_Op>(*bytes.as_ptr().add(24))
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}
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}
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#[cfg(any(
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target_arch = "aarch64",
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target_arch = "x86_64"
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))]
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/// Internal helper
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fn set_discriminant(&mut self, discriminant: discriminant_Op) {
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let discriminant_ptr: *mut discriminant_Op = (self as *mut Op).cast();
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unsafe {
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*(discriminant_ptr.add(24)) = discriminant;
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}
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}
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}
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impl Drop for Op {
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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fn drop(&mut self) {
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// Drop the payloads
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match self.discriminant() {
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discriminant_Op::StderrWrite => unsafe { core::mem::ManuallyDrop::drop(&mut self.StderrWrite) },
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discriminant_Op::StdoutWrite => unsafe { core::mem::ManuallyDrop::drop(&mut self.StdoutWrite) },
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}
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}
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}
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impl Eq for Op {}
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impl PartialEq for Op {
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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fn eq(&self, other: &Self) -> bool {
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if self.discriminant() != other.discriminant() {
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return false;
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}
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unsafe {
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match self.discriminant() {
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discriminant_Op::StderrWrite => self.StderrWrite == other.StderrWrite,
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discriminant_Op::StdoutWrite => self.StdoutWrite == other.StdoutWrite,
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}
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}
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}
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}
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impl PartialOrd for Op {
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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fn partial_cmp(&self, other: &Self) -> Option<core::cmp::Ordering> {
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match self.discriminant().partial_cmp(&other.discriminant()) {
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Some(core::cmp::Ordering::Equal) => {}
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not_eq => return not_eq,
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}
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unsafe {
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match self.discriminant() {
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discriminant_Op::StderrWrite => self.StderrWrite.partial_cmp(&other.StderrWrite),
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discriminant_Op::StdoutWrite => self.StdoutWrite.partial_cmp(&other.StdoutWrite),
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}
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}
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}
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}
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impl Ord for Op {
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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fn cmp(&self, other: &Self) -> core::cmp::Ordering {
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match self.discriminant().cmp(&other.discriminant()) {
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core::cmp::Ordering::Equal => {}
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not_eq => return not_eq,
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}
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unsafe {
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match self.discriminant() {
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discriminant_Op::StderrWrite => self.StderrWrite.cmp(&other.StderrWrite),
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discriminant_Op::StdoutWrite => self.StdoutWrite.cmp(&other.StdoutWrite),
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}
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}
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}
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}
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impl Clone for Op {
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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fn clone(&self) -> Self {
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let mut answer = unsafe {
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match self.discriminant() {
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discriminant_Op::StderrWrite => Self {
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StderrWrite: self.StderrWrite.clone(),
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},
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discriminant_Op::StdoutWrite => Self {
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StdoutWrite: self.StdoutWrite.clone(),
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},
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}
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};
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answer.set_discriminant(self.discriminant());
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answer
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}
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}
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impl core::hash::Hash for Op {
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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fn hash<H: core::hash::Hasher>(&self, state: &mut H) { match self.discriminant() {
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discriminant_Op::StderrWrite => unsafe {
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discriminant_Op::StderrWrite.hash(state);
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self.StderrWrite.hash(state);
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},
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discriminant_Op::StdoutWrite => unsafe {
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discriminant_Op::StdoutWrite.hash(state);
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self.StdoutWrite.hash(state);
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},
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}
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}
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}
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impl core::fmt::Debug for Op {
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#[cfg(any(
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target_arch = "arm",
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target_arch = "aarch64",
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target_arch = "wasm32",
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target_arch = "x86",
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target_arch = "x86_64"
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))]
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fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
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f.write_str("Op::")?;
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unsafe {
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match self.discriminant() {
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discriminant_Op::StderrWrite => f.debug_tuple("StderrWrite")
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.field(&*self.StderrWrite)
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.finish(),
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discriminant_Op::StdoutWrite => f.debug_tuple("StdoutWrite")
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.field(&*self.StdoutWrite)
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.finish(),
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}
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}
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}
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}
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