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gen_dev: Add is_nan_freg_reg64

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This commit is contained in:
Basile Henry 2023-05-03 09:32:19 +01:00
parent 1391920d0e
commit d8b658da5d
3 changed files with 35 additions and 1 deletions
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11
crates/compiler/gen_dev/src/generic64/aarch64.rs
View file

@ -1096,6 +1096,17 @@ impl Assembler<AArch64GeneralReg, AArch64FloatReg> for AArch64Assembler {
cset_reg64_cond(buf, dst, cond);
}
#[inline(always)]
fn is_nan_freg_reg64(
buf: &mut Vec<'_, u8>,
dst: AArch64GeneralReg,
src: AArch64FloatReg,
width: FloatWidth,
) {
fcmp_freg_freg(buf, width, src, src);
cset_reg64_cond(buf, dst, ConditionCode::NE);
}
#[inline(always)]
fn to_float_freg64_reg64(buf: &mut Vec<'_, u8>, dst: AArch64FloatReg, src: AArch64GeneralReg) {
scvtf_freg_reg64(buf, FloatWidth::F64, dst, src);

2
crates/compiler/gen_dev/src/generic64/mod.rs
View file

@ -538,6 +538,8 @@ pub trait Assembler<GeneralReg: RegTrait, FloatReg: RegTrait>: Sized + Copy {
operation: CompareOperation,
);
fn is_nan_freg_reg64(buf: &mut Vec<'_, u8>, dst: GeneralReg, src: FloatReg, width: FloatWidth);
fn to_float_freg32_reg64(buf: &mut Vec<'_, u8>, dst: FloatReg, src: GeneralReg);
fn to_float_freg64_reg64(buf: &mut Vec<'_, u8>, dst: FloatReg, src: GeneralReg);

23
crates/compiler/gen_dev/src/generic64/x86_64.rs
View file

@ -1805,6 +1805,21 @@ impl Assembler<X86_64GeneralReg, X86_64FloatReg> for X86_64Assembler {
};
}
#[inline(always)]
fn is_nan_freg_reg64(
buf: &mut Vec<'_, u8>,
dst: X86_64GeneralReg,
src: X86_64FloatReg,
width: FloatWidth,
) {
match width {
FloatWidth::F32 => cmp_freg32_freg32(buf, src, src),
FloatWidth::F64 => cmp_freg64_freg64(buf, src, src),
}
setp_reg64(buf, dst)
}
#[inline(always)]
fn to_float_freg32_reg64(buf: &mut Vec<'_, u8>, dst: X86_64FloatReg, src: X86_64GeneralReg) {
cvtsi2ss_freg64_reg64(buf, dst, src);
@ -3228,12 +3243,18 @@ fn setge_reg64(buf: &mut Vec<'_, u8>, reg: X86_64GeneralReg) {
set_reg64_help(0x9d, buf, reg);
}
/// `SETO r/m64` -> Set byte if oveflow flag is set.
/// `SETO r/m64` -> Set byte if overflow flag is set.
#[inline(always)]
fn seto_reg64(buf: &mut Vec<'_, u8>, reg: X86_64GeneralReg) {
set_reg64_help(0x90, buf, reg);
}
/// `SETP r/m64` -> Set byte if parity (PF=1).
#[inline(always)]
fn setp_reg64(buf: &mut Vec<'_, u8>, reg: X86_64GeneralReg) {
set_reg64_help(0x9A, buf, reg);
}
/// `RET` -> Near return to calling procedure.
#[inline(always)]
fn ret(buf: &mut Vec<'_, u8>) {