move general to float

crates/compiler/gen_dev/src/generic64/aarch64.rs

@@ -1343,6 +1343,15 @@ impl Assembler<AArch64GeneralReg, AArch64FloatReg> for AArch64Assembler {
         unimplemented!();
     }
 
+    #[inline(always)]
+    fn mov_freg32_reg32(buf: &mut Vec<'_, u8>, dst: AArch64FloatReg, src: AArch64GeneralReg) {
+        fmov_freg_reg(buf, FloatWidth::F32, dst, src)
+    }
+    #[inline(always)]
+    fn mov_freg64_reg64(buf: &mut Vec<'_, u8>, dst: AArch64FloatReg, src: AArch64GeneralReg) {
+        fmov_freg_reg(buf, FloatWidth::F64, dst, src)
+    }
+
     #[inline(always)]
     fn mov_reg_reg(
         buf: &mut Vec<'_, u8>,
@@ -3680,6 +3689,49 @@ fn fdiv_freg_freg_freg(
     buf.extend(inst.bytes());
 }
 
+#[derive(PackedStruct)]
+#[packed_struct(endian = "msb")]
+pub struct FMovGeneral {
+    sf: bool,
+    fixed: Integer<u8, packed_bits::Bits<7>>,
+    ftype: Integer<u8, packed_bits::Bits<2>>,
+    fixed2: bool,
+    rmode: Integer<u8, packed_bits::Bits<2>>,
+    opcode: Integer<u8, packed_bits::Bits<3>>,
+    fixed3: Integer<u8, packed_bits::Bits<6>>,
+    rn: Integer<u8, packed_bits::Bits<5>>,
+    rd: Integer<u8, packed_bits::Bits<5>>,
+}
+
+impl Aarch64Bytes for FMovGeneral {}
+
+fn fmov_freg_reg(
+    buf: &mut Vec<'_, u8>,
+    ftype: FloatWidth,
+    dst: AArch64FloatReg,
+    src: AArch64GeneralReg,
+) {
+    let inst = FMovGeneral {
+        sf: match ftype {
+            FloatWidth::F32 => false,
+            FloatWidth::F64 => true,
+        },
+        fixed: 0b0011110.into(),
+        ftype: match ftype {
+            FloatWidth::F32 => 0b00.into(),
+            FloatWidth::F64 => 0b01.into(),
+        },
+        fixed2: true,
+        rmode: 0b00.into(),
+        opcode: 0b111.into(),
+        fixed3: 0b000000.into(),
+        rn: src.id().into(),
+        rd: dst.id().into(),
+    };
+
+    buf.extend(inst.bytes());
+}
+
 /// `FMOV Sd/Dd, Sn/Dn` -> Move Sn/Dn to Sd/Dd.
 #[inline(always)]
 fn fmov_freg_freg(
@@ -4875,6 +4927,24 @@ mod tests {
         );
     }
 
+    #[test]
+    fn test_fmov_freg_reg() {
+        disassembler_test!(
+            fmov_freg_reg,
+            |ftype: FloatWidth, reg1: AArch64FloatReg, reg2: AArch64GeneralReg| format!(
+                "fmov {}, {}",
+                reg1.capstone_string(ftype),
+                match ftype {
+                    FloatWidth::F32 => reg2.capstone_string_32bit(UsesZR),
+                    FloatWidth::F64 => reg2.capstone_string(UsesZR),
+                }
+            ),
+            ALL_FLOAT_TYPES,
+            ALL_FLOAT_REGS,
+            ALL_GENERAL_REGS
+        );
+    }
+
     #[test]
     #[allow(clippy::unusual_byte_groupings)]
     fn test_encode_f32_to_imm8() {

crates/compiler/gen_dev/src/generic64/mod.rs

@@ -311,6 +311,9 @@ pub trait Assembler<GeneralReg: RegTrait, FloatReg: RegTrait>: Sized + Copy {
     fn mov_reg32_freg32(buf: &mut Vec<'_, u8>, dst: GeneralReg, src: FloatReg);
     fn mov_reg64_freg64(buf: &mut Vec<'_, u8>, dst: GeneralReg, src: FloatReg);
 
+    fn mov_freg32_reg32(buf: &mut Vec<'_, u8>, dst: FloatReg, src: GeneralReg);
+    fn mov_freg64_reg64(buf: &mut Vec<'_, u8>, dst: FloatReg, src: GeneralReg);
+
     fn mov_reg_reg(
         buf: &mut Vec<'_, u8>,
         register_width: RegisterWidth,
@@ -4331,7 +4334,7 @@ impl<
                     let val = i64::from_ne_bytes(val.to_ne_bytes());
                     ASM::mov_reg64_imm64(&mut self.buf, reg, val);
 
-                    ASM::to_float_freg64_reg64(&mut self.buf, freg, reg);
+                    ASM::mov_freg64_reg64(&mut self.buf, freg, reg);
 
                     self.storage_manager.free_symbol(&tmp);
                 }
@@ -4346,7 +4349,7 @@ impl<
                     let val = i32::from_ne_bytes(val.to_ne_bytes());
                     ASM::mov_reg64_imm64(&mut self.buf, reg, val as i64);
 
-                    ASM::to_float_freg32_reg64(&mut self.buf, freg, reg);
+                    ASM::mov_freg32_reg32(&mut self.buf, freg, reg);
 
                     self.storage_manager.free_symbol(&tmp);
                 }

crates/compiler/gen_dev/src/generic64/x86_64.rs

@@ -2198,6 +2198,15 @@ impl Assembler<X86_64GeneralReg, X86_64FloatReg> for X86_64Assembler {
         movq_reg64_freg64(buf, dst, src);
     }
 
+    #[inline(always)]
+    fn mov_freg32_reg32(_buf: &mut Vec<'_, u8>, _dst: X86_64FloatReg, _src: X86_64GeneralReg) {
+        unimplemented!("`mov_freg32_reg32` is not currently used by the x86 backend")
+    }
+    #[inline(always)]
+    fn mov_freg64_reg64(_buf: &mut Vec<'_, u8>, _dst: X86_64FloatReg, _src: X86_64GeneralReg) {
+        unimplemented!("`mov_freg64_reg64` is not currently used by the x86 backend")
+    }
+
     #[inline(always)]
     fn mov_reg_reg(
         buf: &mut Vec<'_, u8>,