From fb5f30e5edd0404815d24f904cc0ebf1f09ec27f Mon Sep 17 00:00:00 2001
From: Richard Feldman <oss@rtfeldman.com>
Date: Tue, 24 May 2022 10:54:45 -0400
Subject: [PATCH] Rename Arm to Aarch32, fix some of its code gen

As far as I can tell, Aarch32 only supports 32-bit
registers, so its pointers should be 4 bytes and
its F64 alignment should be 4 bytes as well
(because it's emulated in software).
---
 bindgen/src/bindgen_rs.rs        | 2 +-
 compiler/builtins/src/bitcode.rs | 9 +++------
 compiler/roc_target/src/lib.rs   | 8 ++++----
 3 files changed, 8 insertions(+), 11 deletions(-)

diff --git a/bindgen/src/bindgen_rs.rs b/bindgen/src/bindgen_rs.rs
index ae45129b39..4849f91ff0 100644
--- a/bindgen/src/bindgen_rs.rs
+++ b/bindgen/src/bindgen_rs.rs
@@ -1134,7 +1134,7 @@ fn arch_to_str(architecture: &Architecture) -> &'static str {
         Architecture::X86_64 => "x86_64",
         Architecture::X86_32 => "x86",
         Architecture::Aarch64 => "aarch64",
-        Architecture::Arm => "arm",
+        Architecture::Aarch32 => "arm",
         Architecture::Wasm32 => "wasm32",
     }
 }
diff --git a/compiler/builtins/src/bitcode.rs b/compiler/builtins/src/bitcode.rs
index 8862661791..308ba2eba9 100644
--- a/compiler/builtins/src/bitcode.rs
+++ b/compiler/builtins/src/bitcode.rs
@@ -60,11 +60,8 @@ impl FloatWidth {
         match self {
             F32 => 4,
             F64 | F128 => match target_info.architecture {
-                Architecture::X86_64
-                | Architecture::Aarch64
-                | Architecture::Arm
-                | Architecture::Wasm32 => 8,
-                Architecture::X86_32 => 4,
+                Architecture::X86_64 | Architecture::Aarch64 | Architecture::Wasm32 => 8,
+                Architecture::X86_32 | Architecture::Aarch32 => 4,
             },
         }
     }
@@ -129,7 +126,7 @@ impl IntWidth {
             U64 | I64 => match target_info.architecture {
                 Architecture::X86_64
                 | Architecture::Aarch64
-                | Architecture::Arm
+                | Architecture::Aarch32
                 | Architecture::Wasm32 => 8,
                 Architecture::X86_32 => 4,
             },
diff --git a/compiler/roc_target/src/lib.rs b/compiler/roc_target/src/lib.rs
index 6b031f6756..1106a45805 100644
--- a/compiler/roc_target/src/lib.rs
+++ b/compiler/roc_target/src/lib.rs
@@ -70,7 +70,7 @@ pub enum Architecture {
     X86_64,
     X86_32,
     Aarch64,
-    Arm,
+    Aarch32,
     Wasm32,
 }
 
@@ -79,8 +79,8 @@ impl Architecture {
         use Architecture::*;
 
         match self {
-            X86_64 | Aarch64 | Arm => PtrWidth::Bytes8,
-            X86_32 | Wasm32 => PtrWidth::Bytes4,
+            X86_64 | Aarch64 => PtrWidth::Bytes8,
+            X86_32 | Aarch32 | Wasm32 => PtrWidth::Bytes4,
         }
     }
 
@@ -95,7 +95,7 @@ impl From<target_lexicon::Architecture> for Architecture {
             target_lexicon::Architecture::X86_64 => Architecture::X86_64,
             target_lexicon::Architecture::X86_32(_) => Architecture::X86_32,
             target_lexicon::Architecture::Aarch64(_) => Architecture::Aarch64,
-            target_lexicon::Architecture::Arm(_) => Architecture::Arm,
+            target_lexicon::Architecture::Arm(_) => Architecture::Aarch32,
             target_lexicon::Architecture::Wasm32 => Architecture::Wasm32,
             _ => unreachable!("unsupported architecture"),
         }