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clippy

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Folkert 2023-04-27 00:39:30 +02:00
parent c6c28e7c5d
commit fc391b1ab2
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2 changed files with 7 additions and 6 deletions
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4
crates/compiler/gen_dev/src/generic64/mod.rs
View file

@ -870,7 +870,7 @@ impl<
Layout::I128 | Layout::U128 => {
let offset = self.storage_manager.claim_stack_area(dst, 16);
ASM::mov_base32_reg64(&mut self.buf, offset + 0, CC::GENERAL_RETURN_REGS[0]);
ASM::mov_base32_reg64(&mut self.buf, offset, CC::GENERAL_RETURN_REGS[0]);
ASM::mov_base32_reg64(&mut self.buf, offset + 8, CC::GENERAL_RETURN_REGS[1]);
}
@ -2936,7 +2936,7 @@ impl<
(U64, U128) => {
let src_reg = self.storage_manager.load_to_general_reg(buf, src);
let base_offset = self.storage_manager.claim_stack_area(&dst, 16);
let base_offset = self.storage_manager.claim_stack_area(dst, 16);
let tmp = Symbol::DEV_TMP;
let tmp_reg = self.storage_manager.claim_general_reg(buf, &tmp);

9
crates/compiler/gen_dev/src/generic64/x86_64.rs
View file

@ -462,10 +462,10 @@ impl X64_64SystemVStoreArgs {
let (offset, _) = storage_manager.stack_offset_and_size(&sym);
if self.general_i + 1 < Self::GENERAL_PARAM_REGS.len() {
let reg1 = Self::GENERAL_PARAM_REGS[self.general_i + 0];
let reg1 = Self::GENERAL_PARAM_REGS[self.general_i];
let reg2 = Self::GENERAL_PARAM_REGS[self.general_i + 1];
X86_64Assembler::mov_reg64_base32(buf, reg1, offset + 0);
X86_64Assembler::mov_reg64_base32(buf, reg1, offset);
X86_64Assembler::mov_reg64_base32(buf, reg2, offset + 8);
self.general_i += 2;
@ -473,8 +473,8 @@ impl X64_64SystemVStoreArgs {
// Copy to stack using return reg as buffer.
let reg = Self::GENERAL_RETURN_REGS[0];
X86_64Assembler::mov_reg64_base32(buf, reg, offset + 0);
X86_64Assembler::mov_stack32_reg64(buf, self.tmp_stack_offset + 0, reg);
X86_64Assembler::mov_reg64_base32(buf, reg, offset);
X86_64Assembler::mov_stack32_reg64(buf, self.tmp_stack_offset, reg);
X86_64Assembler::mov_reg64_base32(buf, reg, offset + 8);
X86_64Assembler::mov_stack32_reg64(buf, self.tmp_stack_offset + 8, reg);
@ -2550,6 +2550,7 @@ fn raw_mov_reg_reg(
}
}
#[allow(unused)]
fn raw_movsx_reg_reg(
buf: &mut Vec<u8>,
input_width: RegisterWidth,