ayazhafiz 5e5eb6dca8 (llvm) Generate code for tag unions less than 64 bits in size correctly ... Previously, we assumed that a union layout always lived on >= 1 64-bit boundary when generating an LLVM type for it. For small tags unions, like `[ Ok i8, Err ]` this need not be the case; indeed, a tag union like that is actually only 2 bits - 1 bit for the "i8" data, and one bit of the tag kind. This led to a discrepancy between what the layout IR and generated LLVM code would assume about the size of tag unions. In the case above, the layout IR would assume the tag data is 2 bits wide, and the tag id is 1 bit into the data. But the LLVM code would generate a type that was 65 bits wide, the first 64 bits being for the "i8" data and the last 1 bit being for the tag kind. Usually, just running the LLVM-emitted code would not present a problem. But it does present a problem when we use the layout IR to inspect the result of LLVM-run code, in particular when we try to look up the tag ID, as the repl does. This patch fixes that issue. Note that this bug did not present itself in `test_gen` previously because the data that most tests check against is stored in the front of the representation. Closes #2149		2021-12-26 11:45:02 -06:00
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src	(llvm) Generate code for tag unions less than 64 bits in size correctly	2021-12-26 11:45:02 -06:00
Cargo.toml	Fix llvm Num.toFloat width conversion	2021-12-11 08:12:57 +00:00