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Fix the Py_atomic_* macros. (#12240)
The macros were working only because our usage happened to parse correctly. Changing that usage (e.g. with pointers) would break the macros. This fixes that.
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1 changed files with 24 additions and 24 deletions
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@ -58,10 +58,10 @@ typedef struct _Py_atomic_int {
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atomic_thread_fence(ORDER)
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#define _Py_atomic_store_explicit(ATOMIC_VAL, NEW_VAL, ORDER) \
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atomic_store_explicit(&(ATOMIC_VAL)->_value, NEW_VAL, ORDER)
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atomic_store_explicit(&((ATOMIC_VAL)->_value), NEW_VAL, ORDER)
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#define _Py_atomic_load_explicit(ATOMIC_VAL, ORDER) \
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atomic_load_explicit(&(ATOMIC_VAL)->_value, ORDER)
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atomic_load_explicit(&((ATOMIC_VAL)->_value), ORDER)
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/* Use builtin atomic operations in GCC >= 4.7 */
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#elif defined(HAVE_BUILTIN_ATOMIC)
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@ -92,14 +92,14 @@ typedef struct _Py_atomic_int {
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(assert((ORDER) == __ATOMIC_RELAXED \
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|| (ORDER) == __ATOMIC_SEQ_CST \
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|| (ORDER) == __ATOMIC_RELEASE), \
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__atomic_store_n(&(ATOMIC_VAL)->_value, NEW_VAL, ORDER))
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__atomic_store_n(&((ATOMIC_VAL)->_value), NEW_VAL, ORDER))
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#define _Py_atomic_load_explicit(ATOMIC_VAL, ORDER) \
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(assert((ORDER) == __ATOMIC_RELAXED \
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|| (ORDER) == __ATOMIC_SEQ_CST \
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|| (ORDER) == __ATOMIC_ACQUIRE \
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|| (ORDER) == __ATOMIC_CONSUME), \
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__atomic_load_n(&(ATOMIC_VAL)->_value, ORDER))
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__atomic_load_n(&((ATOMIC_VAL)->_value), ORDER))
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/* Only support GCC (for expression statements) and x86 (for simple
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* atomic semantics) and MSVC x86/x64/ARM */
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@ -324,7 +324,7 @@ inline intptr_t _Py_atomic_load_64bit(volatile uintptr_t* value, int order) {
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}
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#else
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#define _Py_atomic_load_64bit(ATOMIC_VAL, ORDER) *ATOMIC_VAL
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#define _Py_atomic_load_64bit(ATOMIC_VAL, ORDER) *(ATOMIC_VAL)
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#endif
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inline int _Py_atomic_load_32bit(volatile int* value, int order) {
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@ -359,15 +359,15 @@ inline int _Py_atomic_load_32bit(volatile int* value, int order) {
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}
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#define _Py_atomic_store_explicit(ATOMIC_VAL, NEW_VAL, ORDER) \
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if (sizeof(*ATOMIC_VAL._value) == 8) { \
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_Py_atomic_store_64bit((volatile long long*)ATOMIC_VAL._value, NEW_VAL, ORDER) } else { \
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_Py_atomic_store_32bit((volatile long*)ATOMIC_VAL._value, NEW_VAL, ORDER) }
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if (sizeof((ATOMIC_VAL)->_value) == 8) { \
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_Py_atomic_store_64bit((volatile long long*)&((ATOMIC_VAL)->_value), NEW_VAL, ORDER) } else { \
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_Py_atomic_store_32bit((volatile long*)&((ATOMIC_VAL)->_value), NEW_VAL, ORDER) }
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#define _Py_atomic_load_explicit(ATOMIC_VAL, ORDER) \
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( \
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sizeof(*(ATOMIC_VAL._value)) == 8 ? \
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_Py_atomic_load_64bit((volatile long long*)ATOMIC_VAL._value, ORDER) : \
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_Py_atomic_load_32bit((volatile long*)ATOMIC_VAL._value, ORDER) \
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sizeof((ATOMIC_VAL)->_value) == 8 ? \
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_Py_atomic_load_64bit((volatile long long*)&((ATOMIC_VAL)->_value), ORDER) : \
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_Py_atomic_load_32bit((volatile long*)&((ATOMIC_VAL)->_value), ORDER) \
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)
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#elif defined(_M_ARM) || defined(_M_ARM64)
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typedef enum _Py_memory_order {
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@ -391,13 +391,13 @@ typedef struct _Py_atomic_int {
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#define _Py_atomic_store_64bit(ATOMIC_VAL, NEW_VAL, ORDER) \
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switch (ORDER) { \
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case _Py_memory_order_acquire: \
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_InterlockedExchange64_acq((__int64 volatile*)ATOMIC_VAL, (__int64)NEW_VAL); \
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_InterlockedExchange64_acq((__int64 volatile*)&((ATOMIC_VAL)->_value), (__int64)NEW_VAL); \
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break; \
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case _Py_memory_order_release: \
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_InterlockedExchange64_rel((__int64 volatile*)ATOMIC_VAL, (__int64)NEW_VAL); \
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_InterlockedExchange64_rel((__int64 volatile*)&((ATOMIC_VAL)->_value), (__int64)NEW_VAL); \
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break; \
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default: \
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_InterlockedExchange64((__int64 volatile*)ATOMIC_VAL, (__int64)NEW_VAL); \
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_InterlockedExchange64((__int64 volatile*)&((ATOMIC_VAL)->_value), (__int64)NEW_VAL); \
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break; \
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}
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#else
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@ -407,13 +407,13 @@ typedef struct _Py_atomic_int {
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#define _Py_atomic_store_32bit(ATOMIC_VAL, NEW_VAL, ORDER) \
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switch (ORDER) { \
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case _Py_memory_order_acquire: \
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_InterlockedExchange_acq((volatile long*)ATOMIC_VAL, (int)NEW_VAL); \
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_InterlockedExchange_acq((volatile long*)&((ATOMIC_VAL)->_value), (int)NEW_VAL); \
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break; \
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case _Py_memory_order_release: \
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_InterlockedExchange_rel((volatile long*)ATOMIC_VAL, (int)NEW_VAL); \
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_InterlockedExchange_rel((volatile long*)&((ATOMIC_VAL)->_value), (int)NEW_VAL); \
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break; \
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default: \
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_InterlockedExchange((volatile long*)ATOMIC_VAL, (int)NEW_VAL); \
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_InterlockedExchange((volatile long*)&((ATOMIC_VAL)->_value), (int)NEW_VAL); \
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break; \
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}
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@ -454,7 +454,7 @@ inline intptr_t _Py_atomic_load_64bit(volatile uintptr_t* value, int order) {
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}
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#else
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#define _Py_atomic_load_64bit(ATOMIC_VAL, ORDER) *ATOMIC_VAL
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#define _Py_atomic_load_64bit(ATOMIC_VAL, ORDER) *(ATOMIC_VAL)
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#endif
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inline int _Py_atomic_load_32bit(volatile int* value, int order) {
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@ -489,15 +489,15 @@ inline int _Py_atomic_load_32bit(volatile int* value, int order) {
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}
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#define _Py_atomic_store_explicit(ATOMIC_VAL, NEW_VAL, ORDER) \
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if (sizeof(*ATOMIC_VAL._value) == 8) { \
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_Py_atomic_store_64bit(ATOMIC_VAL._value, NEW_VAL, ORDER) } else { \
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_Py_atomic_store_32bit(ATOMIC_VAL._value, NEW_VAL, ORDER) }
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if (sizeof((ATOMIC_VAL)->_value) == 8) { \
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_Py_atomic_store_64bit(&((ATOMIC_VAL)->_value), NEW_VAL, ORDER) } else { \
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_Py_atomic_store_32bit(&((ATOMIC_VAL)->_value), NEW_VAL, ORDER) }
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#define _Py_atomic_load_explicit(ATOMIC_VAL, ORDER) \
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( \
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sizeof(*(ATOMIC_VAL._value)) == 8 ? \
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_Py_atomic_load_64bit(ATOMIC_VAL._value, ORDER) : \
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_Py_atomic_load_32bit(ATOMIC_VAL._value, ORDER) \
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sizeof((ATOMIC_VAL)->_value) == 8 ? \
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_Py_atomic_load_64bit(&((ATOMIC_VAL)->_value), ORDER) : \
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_Py_atomic_load_32bit(&((ATOMIC_VAL)->_value), ORDER) \
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)
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#endif
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#else /* !gcc x86 !_msc_ver */
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