[3.14] gh-128605: Add branch protections for x86_64 in asm_trampoline.S (#128606) (#135077)

Apply Intel Control-flow Technology for x86-64 on asm_trampoline.S.

Required for mitigation against return-oriented programming (ROP)
and Call or Jump Oriented Programming (COP/JOP) attacks.

Manual application is required for the assembly files.

See also: https://sourceware.org/annobin/annobin.html/Test-cf-protection.html
This commit is contained in:
stratakis 2025-06-03 15:31:06 +02:00 committed by GitHub
parent 89df01bd27
commit 899cca6dbf
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GPG key ID: B5690EEEBB952194
2 changed files with 27 additions and 0 deletions

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@ -9,6 +9,9 @@
# }
_Py_trampoline_func_start:
#ifdef __x86_64__
#if defined(__CET__) && (__CET__ & 1)
endbr64
#endif
sub $8, %rsp
call *%rcx
add $8, %rsp
@ -34,3 +37,22 @@ _Py_trampoline_func_start:
.globl _Py_trampoline_func_end
_Py_trampoline_func_end:
.section .note.GNU-stack,"",@progbits
# Note for indicating the assembly code supports CET
#if defined(__x86_64__) && defined(__CET__) && (__CET__ & 1)
.section .note.gnu.property,"a"
.align 8
.long 1f - 0f
.long 4f - 1f
.long 5
0:
.string "GNU"
1:
.align 8
.long 0xc0000002
.long 3f - 2f
2:
.long 0x3
3:
.align 8
4:
#endif // __x86_64__

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@ -473,6 +473,11 @@ elf_init_ehframe(ELFObjectContext* ctx)
DWRF_U8(0); /* Augmentation data. */
/* Registers saved in CFRAME. */
#ifdef __x86_64__
# if defined(__CET__) && (__CET__ & 1)
DWRF_U8(DWRF_CFA_advance_loc | 8);
# else
DWRF_U8(DWRF_CFA_advance_loc | 4);
# endif
DWRF_U8(DWRF_CFA_advance_loc | 4);
DWRF_U8(DWRF_CFA_def_cfa_offset); DWRF_UV(16);
DWRF_U8(DWRF_CFA_advance_loc | 6);